1. Field of the Invention
The present invention relates to a pattern-forming method by a multilayer resist process, a resist underlayer film, and a resist underlayer film-forming composition.
2. Discussion of the Background
In manufacturing integrated circuit elements and the like, a pattern-forming method utilizing a multilayer resist process has been in widespread use to meet miniaturization of processing size. With respect to the multilayer resist process, a resist underlayer film-forming composition is first coated on a substrate, and a photoresist composition is further coated thereon. Then, a mask pattern is transferred to the resist coating film by a stepping projection aligner (i.e., stepper), and subsequent development with a proper developer solution gives a photoresist pattern. Subsequently, the pattern is transferred to the resist underlayer film by dry etching. Finally, the resist underlayer film pattern is transferred to the substrate by dry etching, whereby the substrate with a desired pattern can be obtained. Furthermore, a multilayer resist process involving three or more layers may be employed, in which an intermediate layer is further provided on the surface of the resist underlayer film. Additionally, in the formation of the resist pattern methods other than the photoresist, for example a nanoimprint method, are also used.
In general, materials having a high carbon content are used for the resist underlayer film placed directly on the substrate. A high carbon content leads to the increase in etching selectivity at the time of the processing of the substrate, which enables more precise pattern transfer. Thermosetting phenol novolak resins are particularly well-known as materials for the underlayer film. Additionally, it is known that a composition containing an acenaphthylene based polymer exhibits favorable characteristics as the underlayer film (see Japanese Unexamined Patent Application, Publication Nos. 2000-143937 and 2001-40293).
Since the resist underlayer film becomes useless after the pattern formation by the etching, it is removed by ashing or the like. The ashing is typically a process in which oxygen plasma is generated and organic components in the resist underlayer film are burned out by oxygen radicals in the plasma. However, there is a disadvantage that when the ashing is performed on low dielectric materials used in semiconductor substrates, the surface of the semiconductor substrates made of the low dielectric (Low-k) materials are readily deteriorated, or their relative permittivity is increased, due to their low resistance to ashing. Under such circumstances, a technique for peeling the resist underlayer film with a solution has been proposed (see Japanese Unexamined Patent Application, Publication No. 2004-177668); however according to this technique, peelability is lowered in the case in which the resist underlayer film is peeled after subjecting to an etching step.